We have developed a novel solution-based integration scheme featuring organic and metal-oxide semiconductors with a polymeric gate dielectric. The integration relies on a facile subtractive patterning technique for the semiconductors, which, through the selection of an appropriate etch stopper, leads to ideal transistor performance. We utilized this novel integration scheme to fabricate self-aligned transistors and logic circuits with a high-mobility p-type conjugated polymer and an n-type amorphous oxide semiconductor, along with a composite polymeric gate dielectric, all solution-deposited by spin coating. The resulting complementary logic gates are capable of rail-to-rail transitions, low-voltage operation down to a 3.5 V power supply, and ample noise margins. Thanks to the self-aligned-gate approach and the state-of-the-art balanced mobilities of the selected semiconductors, our logic gates achieve megahertz operation, thus demonstrating the strength of our hybrid integration scheme.