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Selective Passivation of GeO2/Ge Interface Defects in Atomic Layer Deposited High-k MOS Structures.


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Authors

Zhang, Liangliang 
Li, Huanglong 
Guo, Yuzheng 
Tang, Kechao 
Woicik, Joseph 

Abstract

Effective passivation of interface defects in high-k metal oxide/Ge gate stacks is a longstanding goal of research on germanium metal-oxide-semiconductor devices. In this paper, we use photoelectron spectroscopy to probe the formation of a GeO2 interface layer between an atomic layer deposited Al2O3 gate dielectric and a Ge(100) substrate during forming gas anneal (FGA). Capacitance- and conductance-voltage data were used to extract the interface trap density energy distribution. These results show selective passivation of interface traps with energies in the top half of the Ge band gap under annealing conditions that produce GeO2 interface layer growth. First-principles modeling of Ge/GeO2 and Ge/GeO/GeO2 structures and calculations of the resulting partial density of states (PDOS) are in good agreement with the experiment results.

Description

Keywords

Al2O3, Ge, first-principles modeling, high-k, interface traps

Journal Title

ACS Appl Mater Interfaces

Conference Name

Journal ISSN

1944-8244
1944-8252

Volume Title

7

Publisher

American Chemical Society (ACS)
Sponsorship
This work was supported in part by the Stanford Initiative for Nanoscale Materials and Processes (INMP). This work was performed at the National Synchrotron Light Source and the Stanford Synchrotron Radiation Laboratory, which are supported by the US Department of Energy. Additional support was provided by the National Institute of Standards and Technology.