Protons: Critical Species for Resistive Switching in Interface‐Type Memristors

Interface‐type (IT) resistive switching (RS) memories are promising for next generation memory and computing technologies owing to the filament‐free switching, high on/off ratio, low power consumption, and low spatial variability. Although the switching mechanisms of memristors have been widely studied in filament‐type devices, they are largely unknown in IT memristors. In this work, using the simple Au/Nb:SrTiO3 (Nb:STO) as a model Schottky system, it is identified that protons from moisture are key element in determining the RS characteristics in IT memristors. The Au/Nb:STO devices show typical Schottky interface controlled current–voltage (I–V) curves with a large on/off ratio under ambient conditions. Surprisingly, in a controlled environment without protons/moisture, the large I–V hysteresis collapses with the disappearance of a high resistance state (HRS) and the Schottky barrier. Once the devices are re‐exposed to a humid environment, the typical large I–V hysteresis can be recovered within hours as the HRS and Schottky interface are restored. The RS mechanism in Au/Nb:STO is attributed to the Schottky barrier modulation by a proton assisted electron trapping and detrapping process. This work highlights the important role of protons/moisture in the RS properties of IT memristors and provides fundamental insight for switching mechanisms in metal oxides‐based memory devices.

layer. Moisture interacts with the metal oxides (or switching layers) by the physisorption or chemisorption, which ultimately alters the overall electrical conductivity of the MIM structures by providing additional ionic charge species such as protons (H + ) and hydroxide (OH − ). [22] For example, moisture (or proton) is essential for the forming process in the HfO 2 based FT memristors. [19] In the Pt/SrTiO 3 /Nb:STO system, it was found that oxygen was trapped and released into the active layer directly from water molecules or oxygen molecules during the SET/ RESET operation. [23] Recently, significant efforts have been devoted to searching for interface type (IT) memristors, where the switching process is nondestructive and uniform under the whole active electrode. It is expected that such IT memristors might out-perform FT memristors in applications, such as nonvolatile memory and neuromorphic computing because of low variability and high energy efficiency. In general, three mechanisms have been reported for IT switching, including ferroelectric polarization, charge species (e.g., V o ·· ) drift, and charge trapping/detrapping. [24,25] The RS is often related to the Schottky barrier height (SBH) modification at the active electrode interfaces due to the migration of charged species. These charged species often originate from the materials itself. In FT memristors, the effect of environmental condition such as the interaction of ambient moisture with filament has been explored. [17,26] However, the role of proton insertion from ambient moisture in IT switching devices is largely unknown so far. Thus, there is a strong need to investigate the effects of ambient moisture in IT memristors and even other emergent electronic devices in general.
To investigate the effect of moisture on IT memristors, we selected one of the most simple and well-studied M/Nb:STO as our model system. A critical feature of the M/Nb:STO is that there is no oxide switching layer involved which makes the data interpretation straightforward. Furthermore, the single crystal Nb:STO has the merit of being highly robust for structural, chemical, and transport properties, making it an excellent candidate for memristor research. Thus, the M/Nb:STO systems have been widely studied to understand the switching mechanism because of simple device structures and large current-voltage (I-V) hysteresis loops. [27,28] Interestingly, even in such a simple system, several switching models have been proposed to explain the RS effects including V o ·· migration under the influence of an electric field, [29,30] localized conducting filament formation [31,32] and charge trapping/detrapping at the interface states (defects, immobile V o ·· , grain boundaries) and interface layers. [33][34][35] The RS behaviors and I-V hysteresis strongly depend on Nb doping concentration, [36] electrode materials, [37] electrode fabrication methods, and interface quality. For example, Li et al. proposed that the RS in Pt/Nb:STO is originated by the Schottky barrier inhomogeneity and electron occupation kinetics at a deep level traps. [38] Sun et al. reported that the trapping and detrapping of carriers in the interface region induces RS in In/Nb:STO. [35] Similarly, Mikeev et al. identified the formation of an unintentional interface charge layer (due to trapping/detrapping) originates RS in Pt/Nb:STO. [39] The charge trapping/detrapping model can be used to explain most of the RS features in M/Nb:STO systems. Some early works have also indicated that the gas environment such as oxygen partial pressure and vacuum can modulate RS properties of the Au/Nb:STO system. [40] Unfortunately, the direct evidence on the role of moisture and gas environment in switching properties in IT memristors has not been reported yet.
In this work, we investigate the role of protons in the RS characteristics of the Au/Nb:STO system. The I-V characteristics of Au/Nb:STO devices are studied under different controlled environments, such as ambient conditions, dry N 2 , dry O 2 , and humid gases at different temperatures. At ambient condition (relative humidity, RH ≈10%), the devices behave as reported in literature with a large I-V hysteresis and the switching behavior is consistent with the charge trapping/ detrapping model. Surprisingly, the I-V hysteric behavior disappears once the moisture from the Au/Nb:STO interface is effectively removed through a thermal cycle (room temperature (RT)→270 °C→RT) under flow of different gases (dry N 2 , dry O 2 , dry Ar). More interestingly, the large I-V hysteresis can be recovered with the flow of humid gas, such as air and wet gases, but not dry gases. With such a controlled experimental approach, it is demonstrated that proton from ambient moisture plays a determining role in the RS characteristics in the M/ Nb:STO systems. We discuss the possible mechanisms on how Schottky barrier parameters are modulated by proton assisted charge trapping/detrapping. The impact of this work goes beyond the present Au/Nb:STO system as many metal oxides are good moisture absorbers.

I-V Characteristics under Ambient Conditions
I-V characteristics have been studied to set a baseline for Au/ Nb:STO systems. Figure 1 shows the typical I-V characteristics of a Au/Nb:STO/Au device measured at RT under ambient condition (air RH ≈10%). All electrical measurements were performed with the Au bar bottom electrode grounded and bias voltage applied to the Au circular top electrodes, as shown in Figure 1a. The linear I-V curves measured between two Au bars confirms the ohmic nature of the bottom electrodes ( Figure S1, Supporting Information). The calculated resistivity (≈0.025 Ω cm) is consistent to the bulk resistivity of the Nb:STO. [41] In contrast, the I-V curves measured between two Au top electrodes demonstrates a rectification behavior in both forward and reverse biasing, indicating that Au/Nb:STO interface is Schottky. First, we investigated the virgin state of the device ( Figure S2(a), S2(b), Supporting Information) as it provides hints to understand the origin of RS. When the positive voltage sweep is applied (0 → 3 V), the first sweep switches the device to low resistance state (LRS) from HRS and then it stays at LRS for second (3 → 0 V) and third sweeps (0 → 3 V). In the case of negative voltage sweep (0 → −6 V), the first sweep starts at HRS (or intermediate level), and the current was further reduced in second and third sweeps. These results indicate that our device is initially at the HRS. This is consistent with the developed strong Schottky barrier due to trapped charge species at the interface. [42,43] Next, we examined the bias voltagedependent RS of our device as shown in Figure S2(c),(d) (Supporting Information). With varying SET voltages between 0.5 and 3 V and fixed RESET voltage at −6 V, the HRS remains the same, while LRS current gradually increases. In the case of fixed SET voltage and varying RESET voltages (−1 to −6 V), the HRS current continuously decreases while the LRS remains consistent. Such SET and RESET voltage-controlled behaviors are shown in Figure S2(e),(f) (Supporting Information). This confirms that the LRS is determined by the SET voltage, while the HRS is determined by the RESET voltage. Such analog RS is promising for analog computing, which can be established by altering the Au/Nb:STO Schottky junction characteristics with bias polarity and amplitudes.
The full I-V loops of twenty devices prepared with different Nb:STO substrates are presented in Figure 1b,c in the linear and logarithmic scale, respectively. All devices showed similar I-V curves and hysteresis, despite varying distance between top and bottom electrodes. This confirms that the RS is dominated by the Au/Nb:STO Schottky interface. The initial (virgin) I-V loops of all devices exhibit switching from HRS to LRS at the threshold voltage (V th ) of 1.2 V when the positive voltage sweep (0 → 3 V) is applied and then switched back to HRS with the negative voltage sweep (3 V → −6 V). Furthermore, Figure 1d shows the I-V curves measured at the low voltage region (between −1 and 1 V) after SET (+3 V) and RESET (−6 V) pulses. This clearly shows that the device is switched to LRS and to HRS with respective to the SET and RESET voltage pulses. This forming-free bipolar switching behavior in our devices matches well with the previous reports in M/Nb:STO devices. [39,43] Also, our results indicate that M/Nb:STO devices show an interface-type resistive switching rather than filament-type. The overall voltage sweeping sequence of 0 → 3 → −6 → 0 V shows large hysteresis loop with a high on/off ratio (>10 4 at 0.6 V) as displayed in Figure 1e, which is important for applications. Here, the Au/Nb:STO interface can be treated as a M/n-type semiconductor junction, and the I-V of HRS can be fitted by the Schottky emission theory [39,44] where A is the junction area, A * (156 A cm −2 ) is the Richardson constant for Nb:STO, [45] q is the electronic charge, k is the Boltzmann constant, T is the temperature, n is the ideality factor, and Φ B is the SBH. With a small positive voltage on the top electrodes, the junction is forwardly biased and the current is defined by Equation (1). Above 1.7 V, the current through the Au/Nb:STO junction is not dominated by Equation (1) anymore. In fact, the bulk limited conduction (Nb:STO substrate) dominates the current flow, as shown in Figure S3 (Supporting Information). [46] By using Equation (1), we fit the Φ B and n in the low forward bias region (<1.7 V). It should be noted that although the junction in the LRS has deviated significantly from an ideal Schottky contact, the fitting of Φ B and n for the HRS and LRS together allows a direct comparison between these two states. The Φ B in the HRS and LRS is extracted to be 1.48 and 0.65 eV, respectively. According to the Schottky-Mott rule, the Schottky barrier height of an M/I junction is equal to the difference between the work function (Φ m ) of the metal and the electron affinity of the semiconductor. [37] In literature, it is quoted that ideal SBH of the Au/Nb:STO junctions should be ≈1.3 eV, given that the electron affinity of Nb:STO and the work function of Au are 3.9 and 5.1 eV, respectively. [27,41] The fitted Φ B at the HRS is often compared with the theoretical predication (1.3 eV) [37,47] and the discrepancy in Φ B is attributed to several factors involved in the RS such as electron tunneling through the barrier, interface barrier inhomogeneity, doping concentration, carrier generation/recombination within the depletion region and existence of interface states and interface layers. [38,42,47,48] However, we propose that the Φ B at the LRS (e.g., 0.65 eV) should be the intrinsic Φ B for the Au/Nb:STO interface without considering interfacial effects. Because Nb:STO is a heavily doped n-type degenerate semiconductor, the real intrinsic Φ B of Au/Nb:STO should be much lower than 1.3 eV. In addition, we will demonstrate that the much higher Φ B at the HRS (e.g., 1.48 eV) could be induced by an interfacial layer via the trapping mechanism. The deduced n values (1.8 for HRS) are significantly larger than the theoretically proposed ideality factor (n = 1) for ideal M/I junctions. Large ideality factors of n > 2 often indicate RS controlled by either the tunneling effect or the charge trapping/detrapping mechanism.

Stability and Dynamic Characteristics under Ambient Conditions
One of the puzzles during our characterization of the Au/ Nb:STO systems is that the overall I-V hysteresis shrinks after endurance and retention tests and the I-V loops can recover over time in air. To understand the device stability and dynamics of RS in Au/Nb:STO devices under ambient conditions, we measured the repeated I-V hysteresis, endurance with pulsed voltage read/write and retention behaviors. As displayed in Figure 2a, the repeated I-V curves showed a gradual increase in the HRS and LRS current and narrowing of hysteresis. It was also observed that the first (virgin) I-V loop was usually wide in the HRS with V th ≈1.2 V, and then the V th was gradually reduced over repeated measurements. Next, the endurance measurements were performed as shown in Figure 2b, in which the + 3 and −6 V pulse of 10 ms were alternately applied to switch the device to the LRS and HRS, respectively. The device demonstrates good stability and uniformity over 10 4 endurance cycles without noticeable change in the LRS and HRS. The on/off ratio of 10 4 is maintained at 0.6 V readout voltage throughout the endurance test. Then, we compared the I-V hysteresis before and after the endurance test as displayed in Figure 2c. Interestingly, we found a significant difference between these two I-V curves although the endurance test showed a good RS stability. The I-V curve after endurance test exhibits narrower hysteresis and higher current in both LRS and HRS, which is consistent with the repeated I-V hysteresis measurements. Corresponding Schottky junction parameters suggest a reduction of Φ B and an increase of n for both the HRS and LRS over a long-elapsed time of continuous measurements. These results indicate that the Au/Nb:STO interface gradually changes from an extrinsically dominated mechanism (e.g., the existence of an interfacial layer due to trapping) to an intrinsic process (original Au/Nb:STO interface without an interfacial layer). This could be correlated to the induced thermal heating during endurance and retention tests. In other words, the temperature of the measured devices increases with time after repeating measurements. Such a hypothesis is supported by the fact that I-V curve returns to the original shape/ size after sitting the device idle in air for a couple of hours. Reduction in I-V hysteresis at increased temperatures has been reported for M/Nb:STO junctions and correlated to thermally activated processes like tunneling, thermionic emission and thermionic-field emission. [33,38,43] In addition, local heating induced small-scale inhomogeneity of the Φ B , and redistribution of interface deep level traps could be accountable for this effect as reported. [42,49] Furthermore, we examined the current relaxation behavior after switching the device either to LRS or HRS by applying a DC pulse (10 ms) of +3 or −6 V, respectively.
where β is a constant less than 1. These results confirm the mechanism of charge trapping/detrapping process at interface states and interfacial layers in the Au/Nb:STO systems. As seen in the time-dependent plots, the current relaxation is quite slow with the exponent, β, significantly less than 1 at positive read voltages. However, the current decay rate is pronounced at negative read voltage of −0.4 V. The current decay could be correlated to a progressive trapping of negative charges that were detrapped from the interface state upon switching to the LRS. [39] The current decay rate with negative voltage is higher as it facilitates the charge trapping process.

RS under Different Atmosphere
Ohsawa and co-workers reported that I-V hysteresis was not observed in as-prepared Au/Nb:STO and the rectifying properties emerge after exposing the devices to air. [43] We have observed that the I-V hysteresis and shape can change with measurements ( Figure 2) and weather (data not shown). In fact, in FT memristor, moisture can induce a large variation in I-V and C-V measurements. [19] We hypothesize that moisture plays a critical role in the switching of the IT M/Nb:STO memristive systems but the mechanisms of moisture in IT memristors is not reported. To directly observe the effect of water molecule on RS at the Au/Nb:STO junction, we studied the I-V characteristics under ambient, N 2 , and O 2 atmosphere at different temperatures. Figure 3a shows a typical wide I-V hysteresis observed under ambient condition (RH ≈10%). The LRS has a "V" shape and HRS has a "U" shape. When the device was maintained at 270 °C for 2 h, a significant change in the I-V profile was visible as the HRS and LRS current in the low voltage region (−1 to 1 V) were significantly increased (consistent with Equation (1)). It is interesting to observe that the I-V hysteresis was significantly reduced but was not completely collapsed at 270 °C under air ambient. The LRS current of the Au/Nb:STO device follows Curie-von Schweidler relaxation law under ambient atmosphere. Once the device was cooled down to RT, the I-V hysteresis was recovered to its original shape/size. The temperature dependent I-V profiles measured with the flow of dry N 2 and dry O 2 are completely different. The devices in the probe chamber were flushed for 1 h with respective dry gases to remove the ambient atmosphere. The initial I-V profiles at RT under dry N 2 or dry O 2 flow were identical to the one measured in ambient air. In fact, the I-V curves measured in a rough vacuum (≈10 mTorr) are identical with the ones measured under ambient conditions. Therefore, flowing dry gas at RT and putting the samples in a rough vacuum (at RT) barely remove water molecules captured at the interface. However, when the devices are heated to 270 °C and hold at such a temperature for 2 h with the flow of dry N 2 and dry O 2 , the I-V hysteresis changes significantly as shown in Figure 3e,h. Furthermore, the retention characteristics of Au/Nb:STO were measured at 270 °C under ambient and N 2 atmosphere as shown in Figure S5 (Supporting Information). Even at high temperature, the LRS current of the Au/Nb:STO device follows Curie-von Schweidler relaxation under ambient atmosphere. However, interestingly, a minor gain in the LRS current was observed over the time under N 2 atmosphere. This can be correlated to the lack of charge trapping at the Au/Nb:STO interface under an inert atmosphere and gradual development of trap free interface at high temperature. In the case of the HRS current under ambient, it tends to increase because the mean time spent by a carrier in a trap state decreases with increasing temperature and/or the trapping process would be hindered at high temperature. This process was much pronounced under N 2 atmosphere and the HRS collapses into the LRS as shown in Figure S5(b) (Supporting Information). Such a collapsed I-V hysteresis is characterized by the change of the "U" shaped HRS into a "V" shaped LRS. The I-V curves stay collapsed during cooling down to RT with a constant flow of dry gases (Figure 3f,i). The samples were then kept at RT with a constant dry gas flow for another 24 h and the collapsed I-V hysteresis loops were not recovered. The HRS disappears and the associated SBH reduces by flowing dry N 2 or O 2 at elevated temperatures. Therefore, it is highly likely that water molecules absorbed at the Au/Nb:STO interface can be effectively removed by dry gas flow at higher temperatures. Without water molecules at the interface, the electron trapping could be hindered. SBH and HRS will not be effectively established. Thus, the I-V curves at the LRS reflect the intrinsic I-V characteristic of a "clean" Au/Nb:STO interface without the interfacial layer. This is consistent with the early discussion that LRS with SBH of 0.65 eV is the original SBH of the Au/Nb:STO without the interfacial layer, which is confirmed by the extracted Schottky barrier parameters of the collapsed I-V hysteresis. Our results confirm that the water molecule at the Au/Nb:STO interface is a critical ingredient for HRS, SBH, and large on/off ratio.

Effect of Interfacial Quality
To study the effect of Nb:STO interface quality on this process, we annealed Nb:STO substrates at different temperatures.
The atomic force microscope (AFM) analysis in Figure S6 (Supporting Information) shows cleaner surface and reduced roughness of annealed Nb:STO as compared to the unannealed one. It is expected that annealing increases the Au/Nb:STO interface quality by reducing the suface dangling bonds, vacany defects, carbon and other organic molecules. We found that Nb:STO annealing directly influences the I-V hysteresis as shown in Figure 4a but the RS direction remained the same. The higher the annealing temperature is, the smaller the opening (on/off ratio shown in Figure S8(a),S8(c) (Supporting Information)) of the hysteresis loops is. Specifically, the HRS in positive bias demonstrates the effect of interface quality in the RS where the V th and Φ B were reduced for the devices prepared with the annealed Nb:STO as displayed in Figure 4b and Figure S7(a) (Supporting Information). This could be attributed to the reduction in trapped charge at the interface as mositure incorporation sites (such as surface dangling bonds and vacancy defects) were reduced by annealing the Nb:STO susbstrate at high temperautre under ambient. Once the trapped charge from the interface were removed, i.e., under LRS, the Φ B seems to be similar for all three devices as the Schottky barrier would be mostly determined by the Au work function and Nb:STO electron affinity. Furthermore, the C-V measurement at 1 MHz in Figure S7(b) (Supporting Information) showed increase in the device capacitance with annealed Nb:STO, which could be correlated to the reduction in the depletion layer width as the interface charge trapping density reduces with better interface quality. [50] Since the trapping of charge was reduced for annealed Nb:STO devices, the LRS current decay rate was found to be enhanced as compared to the unannealed Nb:STO device as shown in Figure S8(b),S8(d) (Supporting Information). From these observations, it could be inferred that better interface quality is less likely to absorb water molecules, resulting in the narrow I-V hysteresis. Interestingly, a study of electrode/interface quality has shown that Pt/Nb:STO devices with high quality top electrodes (epitaxial Pt films grown at 800 °C by DC sputtering) show a similar I-V profile as our collapsed loops (LRS, without the effect of moisture), while devices with low quality top electrodes (polycrystalline Pt films grown at RT by e-beam evaporation) show a similar I-V profile as our loops measured in air/moisture as shown in Figure 4c,d (Supporting Information). [39] This indicates that the quality of the top electrode also plays a critical role in the absorption of water molecules at the interface. However, the effect of top electrode quality on water molecule absorption seems much stronger than the Nb:STO surface quality as indicated by the ideality factor change in Figure 4b,c. It should also be pointed out that the Nb:STO annealing would not necessarily remove the I-V hysteresis if the top metal electrode was not fabricated with high quality. Regardless, moisture capturing by defects near the M/Nb:STO interface (e.g., the grain boundary in the top metal electrodes and Nb:STO defects) seems crucial for RS in M/Nb:STO devices. Since moisture is not permanently bonded to the interface, it is understandable that temperature changes, continuous measurements, or RH change can modify the electron trapping/detrapping process as well as the RS characteristics.

I-V Hysteresis Loop Recovery
To unambiguously demonstrate that moisture is the one of the most critical components for the observed I-V hysteresis, we also studied the I-V hysteresis recovery process under different flowing gases and environments. The experimental setup is shown in Figure 5a. Initially, the Au/Nb:STO device was heated under dry N 2 flow until the I-V hysteresis was completely removed as shown in Figure 5b. Then, the device was naturally cooled down to RT with a constant dry N 2 flow. The I-V profiles were not changed after keeping the device in a constant dry N 2 flow for 24 h at RT. Next, the gas flow was switched to dry O 2 for another 24 h and there was no significant change in I-V profiles neither as shown in the inset of Figure 5b. Interestingly, when the device was exposed to ambient air with the RH of ≈10%, the I-V profile started to recover within 1 h and almost fully recovered within 24 h as shown in Figure 5c. A similar test was performed on the device whose I-V hysteresis was partially reduced after the endurance test. In this case, the I-V hysteresis, as seen in Figure 5d, was recovered much faster than the thermal cycled device. During the recovery, the HRS changes from the "V" shape back to the "U" shape. It indicates that the device exposed to ambient conditions with the existence of moisture gradually traps electrons and becomes more resistive as electron trapping strengthens the Schottky barrier. Further, we studied the I-V hysteresis recovery under humid N 2 conditions (Figure 5e,f) to rule out the effect of other ambient species, such as carbon dioxide and organic compounds. The RH under this atmospheric condition was about 82%. A noticeable change in I-V hysteresis was seen after 10 min of humid N 2 flow at RT and the hysteresis loop further opens up after a few hours. After 24 h of humid N 2 flow, the I-V curve was almost recovered with the "V" shape LRS and the "U" shape HRS. The only difference is that the current dip is located at −1 V, while it is located at the positive voltage in the initial one. Such a difference is seen in M/Nb:STO and M/oxide/Nb:STO systems, [15,23] which could be related to different interface states. [39] We further analyzed the retention properties under high RH as shown in Figure S9 (Supporting Information). Under high humidity condition, the LRS current seems to stable although the overall LRS current was significantly (about 2 order) less than that of with 10% RH. This indicates that the device was not fully SET as the trap states would be instantly occupied by the electron trapping via ambient moisture interaction. A major difference was observed in the HRS current under high RH as it tends to decrease over the time. This suggests that the HRS recovery under high RH is much pronounced. These results indicate that the RH has significant impact on the electron trapping/ detrapping dynamics and thus the resisting switching process. Interestingly, a fully recovered (including the appearance of a current dip at the positive voltage) I-V hysteresis was achieved by heating up the device with the flow of humid N 2 at 160 °C and above as shown in Figure 5f. Similar results were seen in humid Ar flow, indicating moisture itself is critical for the recovery rather than the carrier gas. Above results have unambiguously shown the critical role of moisture in controlling on/ off ratio of I-V hysteresis loop in Au/Nb:STO systems. In a measurement condition with limited amount of moisture (via heating and flowing of dry gas), the HRS of this model system collapses to the LRS as the LRS is the pristine state for the Au/ Nb:STO system with a "clean" interface. Only when the samples are exposed to moisture, HRS recovers and SBH restores as water molecules are the main ingredient of the interfacial layer for electron trapping. Our results suggest that moisture is one of the most critical agents for the switching behavior in the M/Nb:STO systems.

RS Mechanism
This work confirms the modulation of Schottky barrier by charge trapping/detrapping is the switching mechanism for M/Nb:STO systems. Our results have concluded that moisture trapped at the interface of M/Nb:STO is the major source for electron trapping and Schottky interface modulation. Additionally, devices without moisture exposure would behave as an intrinsic Schottky junction between Au and Nb:STO as shown in Figure 6a, where the current is controlled by an intrinsic Schottky barrier parameters. The next important question remains: how does the moisture facilitate electron trapping at the M/Nb:STO interface and affect the Schottky barrier parameters? The grain boundaries of the e-beam evaporated metal electrodes and imperfections of the Nb:STO surface provide defect sites to capture water molecules at the M/Nb:STO interface. Given that the dominant ionic point defects are vacancies in the Nb:STO, the interaction of moisture can be explained by the following reactions [21,51] Here, the Equation (2) represents the hydration reaction where water fills V o ·· and generates substitutional hydroxide ions, OH o · . The OH o · is a proton bound to oxygen also known as a protonic defect. [19] Positively charged proton can serve as trap sites to capture conduction band electrons and the O o x can be incorporated at the interface as shown by the Equation (3). In Equation (4), water may also directly interact with electrons and form negatively charged OH − near the interface. Equations (3) and (4) outline two possible scenarios that electrons can be trapped at the M/Nb:STO interface, serving as the interfacial charge layer as shown in Figure 6b. Therefore, it is worthwhile to understand the physical picture of electron trapping/detrapping process during switching and how the SBH is modulated by this process. A positive bias on the top Au electrode tends to remove the electrons from trapping, i.e., detrapping process. The device now set to the LRS as displayed in Figure 6c. The effect of the SET voltage on the detrapping process ( Figure S2, Supporting Information) shows that a minimum SET voltage of + 2 V is required to fully set the device (to the LRS) or complete the detrapping process. With the existence of moisture, the trapping process (or RESET) is possible (Figure 6b). The effect of the RESET voltage on the trapping process ( Figure S2, Supporting Information) shows that a minimum RESET voltage of −5 V is required to fully reset the device into the HRS. Since the RESET is assisted by moisture, the devices with moisture intentionally removed is unable to finish the RESET (i.e., electron trapping) process. Therefore, a collapsed I-V curve is expected as shown in Figure 5b and I-V curves will resemble the pristine original state without exposure to moisture seen in Figure 6a.
The modulation of the SBH by electron trapping has already been carefully discussed. [33,39,47] In short, the trapping process results in a negatively charged interfacial layer with a trapped charge amount of Q T . The variation of Q T in the interface region has to be compensated by the increase of positively charged depletion layer charge, Q SC , in order to satisfy the charge neutrality. This ultimately affects the distribution of surface potential profiles and increases the Φ B and W d . Therefore, the HRS is enabled after completing the RESET or charge trapping process. In contrary, under forward positive bias, the captured electrons detrap from the interface, resulting in the SET process or LRS.

Conclusions
In conclusion, by using a simple Au/Nb:STO model system, we have experimentally demonstrated that proton insertion from ambient moisture is the most important element for the observed RS characteristics in forming-free IT memristors. The Au/Nb:STO devices exhibited wide I-V hysteresis in a moist atmosphere, whereas the I-V hysteresis was diminished in the absence of moisture. The collapsed I-V hysteresis was featured by the disappearance of the HRS and the reduction of SBH, which was enabled by moisture-assisted electron detrapping process. The original I-V hysteresis with a large opening can be restored if the devices are exposed to moisture in ambient conditions or humid gases. Our results have unambiguously demonstrated the role of moisture in the charge trapping/ detrapping process for forming-free IT memristors. The principle of moisture induced RS discovered in this model system can be applied to a variety of other systems employing different metal oxides as the switching layer.

Experimental Section
In this work, commercially available 1.4 wt% Nb doped STO single crystal substrates (CrysTec, GmbH, Germany) were used for device fabrication. The devices were prepared on unannealed and annealed Nb:STO substrates in order to vary the interface properties. For annealed Figure 6. A proposed moisture induced charge trapping and detrapping mechanism at Au/Nb:STO interface. a) Initial stage of the Au/Nb:STO device, without exposure to moisture showing a clean interface and an intrinsic Schottky barrier profile. b) With the negative bias on the top Au interface, charges (e.g., electrons) trap at the interface via moisture interaction. The device goes to the HRS upon building an interfacial charge layer, corresponding an increase in Φ B and W d . c) With the positive bias on the top Au interface, electrons detrap from the interface, corresponding to a decrease in Φ B and W d . The device goes to the LRS. devices, the Nb:STO substrates were annealed in a tube furnace at 400 and 750 °C for 2 h in ambient conditions. Au electrodes (large bar and small disks) of ≈100 nm thickness were deposited on Nb:STO substrates through shadow mask by e-beam evaporation at 140 °C. The circular Au disks (top electrodes) were of 300 µm in diameter, while the rectangular Au bars (bottom electrodes) were of 2 (w) × 5 (l) mm 2 in area. The I-V and C-V characteristics of the Au/Nb:STO device were measured using an Agilent E4980A LCR meter. In order to prevent device breakdown, compliance current (CC) of 0.01 A was used during measurement. For the C-V measurements, 50 mV of AC voltage was applied. The temperature and environment dependent I-V measurements were carried out in a Linkam HFS600E-PB4 probe station. The probe station has built-in gas in/out valve and heating stage. The temperature of the heating stage can be precisely controlled during the experiment. For experiments under different atmospheres, a continuous flow of dry N 2 , dry O 2, dry Ar, and humid N 2 in the probe chamber was constantly maintained at 250 cc min −1 with a gas flow controller. The RH inside a probe chamber was ≈10% under ambient conditions and was ≈82% under humid N 2 flow as monitored by a temperature/humidity thermistor (SRH77A, cooper, USA). AFM (Bruker, USA) was used to image the surface morphology of the Nb:STO samples.

Supporting Information
Supporting Information is available from the Wiley Online Library or from the author.