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    • CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization 

      Watson, Robert Nicholas; Woodruff, Jonathan; Neumann, Peter G; Moore, Simon William; Anderson, Jonathan; Chisnall, David; Dave, Nirav et al. (IEEE, 2015-05-26)
      CHERI extends a conventional RISC Instruction- Set Architecture, compiler, and operating system to support fine-grained, capability-based memory protection to mitigate memory-related vulnerabilities in C-language TCBs. We ...
    • Fast Protection-Domain Crossing in the CHERI Capability-System Architecture 

      Watson, Robert Nicholas; Norton, Robert; Woodruff, Jonathan; Joannou, Alexandre; Moore, Simon William; Neumann, Peter G; Anderson, Jonathan et al. (IEEE, 2016-10-27)
      Capability Hardware Enhanced RISC Instructions (CHERI) supplement the conventional memory management unit (MMU) with instruction-set architecture (ISA) extensions that implement a capability system model in the address ...