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Software Prefetching for Indirect Memory Accesses

Accepted version
Peer-reviewed

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Abstract

Many modern data processing and HPC workloads are heavily memory-latency bound. A tempting proposition to solve this is software prefetching, where special non-blocking loads are used to bring data into the cache hierarchy just before being required. However, these are difficult to insert to effectively improve performance, and techniques for automatic insertion are currently limited.

This paper develops a novel compiler pass to automatically generate software prefetches for indirect memory accesses, a special class of irregular memory accesses often seen in high-performance workloads. We evaluate this across a wide set of systems, all of which gain benefit from the technique. We then evaluate the extent to which good prefetch instructions are architecture dependent. Across a set of memory-bound benchmarks, our automated pass achieves average speedups of 1.3× and 1.1× for an Intel Haswell processor and an ARM Cortex-A57, both out-of-order cores, and performance improvements of 2.1× and 3.7× for the in-order ARM Cortex-A53 and Intel Xeon Phi.

Description

Keywords

Software Prefetching, Compiler Analysis

Journal Title

CGO'17: PROCEEDINGS OF THE 2017 INTERNATIONAL SYMPOSIUM ON CODE GENERATION AND OPTIMIZATION

Conference Name

2017 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)

Journal ISSN

2164-2397

Volume Title

Publisher

IEEE
Sponsorship
EPSRC (1510365)
Engineering and Physical Sciences Research Council (EP/K026399/1)