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Direct charge measurement in Floating Gate transistors of Flash EEPROM using Scanning Electron Microscopy

Accepted version
Peer-reviewed

Type

Conference Object

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Authors

Skorobogatov, Sergei  ORCID logo  https://orcid.org/0000-0001-9414-6489
Woods, C 

Abstract

We present a characterization methodology for fast direct measurement of the charge accumulated on Floating Gate (FG) transistors of Flash EEPROM cells. Using a Scanning Electron Microscope (SEM) in Passive Voltage Contrast (PVC) mode we were able to distinguish between '0' and '1' bit values stored in each memory cell. Moreover, it was possible to characterize the remaining charge on the FG; thus making this technique valuable for Failure Analysis applications for data retent ion measurements in Flash EEPROM. The technique is at least two orders of magnitude faster than state-of-the-art Scanning Probe Microscopy (SPM) methods. Only a relatively simple backside sample preparation is necessary for accessing the FG of memory transistors. The technique presented was successfully implemented on a 0.35 μm technology node microcontroller and a 0.21 μm smart card integrated circuit. We also show the ease of such technique to cover all cells of a memory (using intrinsic features of SEM) and to automate memory cells characterization using standard image processing technique.

Description

Keywords

Flash EEPROM, Reverse engineering, Scanning Electron Microscope (SEM), Passive Voltage Contrast (PVC), Image processing

Journal Title

Email a friend ISTFA 2016 Proceedings from the 42nd International Symposium for Testing and Failure Analysis

Conference Name

International Symposium for Testing and Failure Analysis

Journal ISSN

Volume Title

Publisher

ASM International