A Circuit Model for CMOS Hall Cells Performance Evaluation including Temperature Effects
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Paun, M., Sallese, J., & Kayal, M. (2013). A Circuit Model for CMOS Hall Cells Performance Evaluation including Temperature Effects. https://doi.org/10.1155/2013/968647
In order to provide the information on their Hall voltage, sensitivity, and drift with temperature, a new simpler lumped circuit model for the evaluation of various Hall cells has been developed. In this sense, the finite element model proposed by the authors in this paper contains both geometrical parameters (dimensions of the cells) and physical parameters such as the mobility, conductivity, Hall factor, carrier concentration, and the temperature influence on them. Therefore, a scalable finite element model in Cadence, for behavior simulation in circuit environment of CMOS Hall effect devices, with different shapes and technologies assessing their performance, has been elaborated.
External DOI: https://doi.org/10.1155/2013/968647
This record's URL: https://www.repository.cam.ac.uk/handle/1810/267611
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Rights Holder: Copyright © 2013 Maria-Alexandra Paun et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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