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dc.contributor.authorYang, X
dc.contributor.authorOtsuki, M
dc.contributor.authorPalmer, Patrick
dc.date.accessioned2018-12-15T00:30:28Z
dc.date.available2018-12-15T00:30:28Z
dc.date.issued2015-03
dc.identifier.issn1755-4535
dc.identifier.urihttps://www.repository.cam.ac.uk/handle/1810/286985
dc.publisherInstitution of Engineering and Technology (IET)
dc.titlePhysics-based insulated-gate bipolar transistor model with input capacitance correction
dc.typeArticle
prism.endingPage427
prism.issueIdentifier3
prism.publicationDate2015
prism.publicationNameIET Power Electronics
prism.startingPage417
prism.volume8
dc.identifier.doi10.17863/CAM.34294
rioxxterms.versionofrecord10.1049/iet-pel.2014.0169
rioxxterms.versionAM
rioxxterms.licenseref.urihttp://www.rioxx.net/licenses/all-rights-reserved
rioxxterms.licenseref.startdate2015-01-01
dc.identifier.eissn1755-4543
rioxxterms.typeJournal Article/Review
cam.issuedOnline2015-03
rioxxterms.freetoread.startdate2016-01-01


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