Symmetric Circuits for Rank Logic.
| dc.contributor.author | Dawar, Anuj | |
| dc.contributor.author | Wilsenach, Gregory | |
| dc.contributor.editor | Ghica, DR | |
| dc.contributor.editor | Jung, A | |
| dc.date.accessioned | 2018-11-21T00:30:46Z | |
| dc.date.available | 2018-11-21T00:30:46Z | |
| dc.date.issued | 2018 | |
| dc.identifier.isbn | 978-3-95977-088-0 | |
| dc.identifier.uri | https://www.repository.cam.ac.uk/handle/1810/285515 | |
| dc.publisher | Schloss Dagstuhl - Leibniz-Zentrum für Informatik | |
| dc.rights | Attribution 4.0 International | |
| dc.rights.uri | https://creativecommons.org/licenses/by/4.0/ | |
| dc.title | Symmetric Circuits for Rank Logic. | |
| dc.type | Conference Object | |
| prism.endingPage | 20:1 | |
| prism.publicationDate | 2018 | |
| prism.publicationName | CSL | |
| prism.startingPage | 20:1 | |
| prism.volume | 119 | |
| dc.identifier.doi | 10.17863/CAM.32873 | |
| rioxxterms.versionofrecord | 10.17863/CAM.32873 | |
| rioxxterms.licenseref.uri | http://www.rioxx.net/licenses/all-rights-reserved | |
| rioxxterms.licenseref.startdate | 2018 | |
| dc.contributor.orcid | Dawar, Anuj [0000-0003-4014-8248] | |
| rioxxterms.type | Conference Paper/Proceeding/Abstract |
Files in this item
This item appears in the following Collection(s)
-
Cambridge University Research Outputs
Research outputs of the University of Cambridge
Except where otherwise noted, this item's licence is described as Attribution 4.0 International