Hardware implementations of computer-generated holography: a review
Accepted version
Peer-reviewed
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Abstract
Computer-generated holography (CGH) is a technique to generate holographic interference patterns. One of the major issues related to computer hologram generation is the massive computational power required. Hardware accelerators are used to accelerate this process. Previous publications targeting hardware platforms lack performance comparisons between different architectures and do not provide enough information for the evaluation of the suitability of recent hardware platforms for CGH algorithms. We aim to address these limitations and present a comprehensive review of CGH-related hardware implementations.
Description
Keywords
computer-generated holography, central processing unit, graphics processing unit, field-programmable gate array, digital signal processor, hardware accelerator, holography, system-on-chip
Journal Title
Optical Engineering
Conference Name
Journal ISSN
0091-3286
1560-2303
1560-2303
Volume Title
59
Publisher
Society of Photo-optical Instrumentation Engineers
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All rights reserved
Sponsorship
Engineering and Physical Sciences Research Council (EP/M016218/1)
EPSRC (EP/K503757/1)
EPSRC (EP/T008369/1)
EPSRC (EP/K503757/1)
EPSRC (EP/T008369/1)