Integrated Photonic Iterative Processors for Computing

Abstract

The enormous amount of data generated every day in this intelligent era has led to an unprecedented demand for computing power. Since the 2010s, compute demand in the AI industry has increased at a rate of 4.1× per year, reaching up to 50 yotta (1 yotta = 1024) FLOPs by 2024. The gigantic gap between the growth rate of modern computing demand and Moore’s law has urged researchers to explore new approaches to enhance computing power in the post-Moore era. Speed and power efficiency, particularly due to data I/O bottlenecks inherent to the von Neumann architecture, have become two major limitations in further improving the performance of digital electronic computers. Photonic processors have long been considered a promising alternative for accelerating certain signal processing and linear algebra computations due to their in-propagation computation, inherent high parallelism, large bandwidth, low latency, low energy consumption, and low crosstalk. The in-propagation computation feature significantly reduces data I/O demands during computation, giving photonic processors better I/O efficiency compared to traditional digital electronic computers. However, the claimed speed advantage of photonic processors is offset by the time- and energy- consuming data I/O and signal conversions between the photonic processor and auxiliary electronics. To build a practically useful optical processor, it is essential to explore new applications that improve the computation-to-I/O (C-to-I/O) ratio, i.e., increasing the amount of computation per data I/O. Photonic iterative processors (PIPs) with optical loopback for matrix inversion and related applications happen to be one of such examples towards a more practical optical processor. By enabling direct loopback in the optical domain across different iterations, PIPs significantly reduce data I/O demands, thereby showcasing their I/O advantages. Additionally, the excellent compactness, phase stability, reconfigurability, and energy efficiency of photonic integration platforms are key to fully realising the I/O advantages of PIPs. This thesis investigates PIPs on integrated photonic platforms with significantly reduced data I/O and O/E and E/O conversions. The first photonic integrated PIP architecture is proposed for fast and energy-efficient matrix inversions and matrix-inversion-intensive applications based on the iterative Richardson method. A “Min-Max” algorithm is developed to find the fastest convergence of the iterative Richardson method. Wavelength multiplexing techniques are introduced to enhance processing efficiency. Design principles and performance analyses are explored in detail. The first 2×2 and 4×4 partially integrated crossbar array-based PIPs for real-valued matrix inversions are demonstrated experimentally. The 4×4 partially integrated crossbar array-based PIP is also used to solve integral and differential equations involving 8×8 and 16×16 matrix inversions by using block matrix inversion methods. This thesis demonstrates the first 2×2 partially integrated crossbar array-based PIPs with on-chip optical loops for complex-valued matrix inversions, achieving a net inversion time of 1.2 ns. All the demonstrations showcase notable I/O efficiency enhancements over traditional digital electronic and photonic processors. Furthermore, the first 8×8 partially integrated MZI mesh-based PIP with on-chip optical loops for complex-valued matrix inversions is fabricated, offering a promising alternative to crossbar-array based PIPs when on-chip gain integration is unavailable for PIP size not exceeding 16×16. More tests will be performed when the re-fabricated chip with improved undercut technology is received. In addition, the first attempt to build a 4×4 fully integrated crossbar array-based PIP for complex-valued matrix inversions has been made, providing valuable experience for potential future work. For the first time, this thesis introduces the concept of the C-to-I/O ratio for characterising the I/O efficiency of processor hardware. Leveraging the concept of the C-to-I/O ratio and the performance analyses of the proposed PIP architecture, this thesis theoretically predicts an enhancement in I/O efficiency of up to one to two orders of magnitude compared to traditional digital electronic and photonic processors for two practical applications: MIMO precoding and reservoir training tasks. The PIP represents a promising step towards a practically useful optical processor. Besides fully optical feedback processing architectures, this thesis also explores a hybrid optical-electrical iterative processing system using segmented MZIs, aiming at solving equations using simple iterative linear methods, eliminating the need for on-chip optical gain. A 2×2 real-valued equation solving example is demonstrated experimentally. Finally, this thesis presents methods for designing electrical control systems for large-scale photonic integrated circuits. The developed automatic electrical control systems are used for demonstrating PIPs and other chips used in optical sensing and switching applications.