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Metal oxide thin film transistors for CMOS applications



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Van Fraassen, Niels 


Abstract Title: Metal oxide thin film transistors for CMOS applications Author: N.C.A. van Fraassen CMOS technology based on oxide thin film transistors (TFTs) is essential to reduce the power consumption and increase the complexity of low-cost (flexible) processors. These processors have the potential to create ultralow-cost (~1 pence) chips that can turn everyday objects into smart-objects. This thesis presents research on the development of all-oxide CMOS technology. N-type amorphous indium-silicon-oxide (a-ISO) and p-type tin monoxide (SnO) TFTs were fabricated and studied in detail. Both these oxides are excellent candidates for low-cost, low-power, flexible CMOS technology which is essential to reduce the power consumption of flexible processors. All oxide CMOS inverters were created by connecting n-type a-ISO and p-type SnO TFTs. By carefully tuning the geometric aspect ratio of the inverter, a rail-to-rail voltage swing was demonstrated for supply voltages as low as 1 V. We investigated how changing the width-to-length ratio (W/L) of p-type SnO TFTs affects the characteristics of the all-oxide CMOS inverter. Typically, W/L of the lower mobility p-type TFT (n-type for organics) is scaled up (inversely with mobility) to match the higher on-current of the n-type (p-type); this is also common for silicon CMOS technology. In this work it is shown that this method is unsuitable for transistors where not only the on-current, but also the off-current, scales with W/L - including flexible p-type metal-oxide and n-type organic TFTs. The concept of an optimal geometric aspect ratio is introduced that can be applied universally to silicon, metal-oxide and organic complementary inverters. This ratio determines the W/L of the p-type (n-type) transistor that maximises the inverter efficiency represented by the average switching current divided by the static currents. Notably, this work shows that reducing W/L of metal-oxide p-type TFTs increases the inverter efficiency, while reducing the area compared to simply scaling up W/L inversely with mobility. A high inverter efficiency is critical to reduce static power consumption and increase the gate density of flexible processors. Lastly, we investigated a novel memristor-transistor inverter, where the p-type TFT in the standard CMOS configuration is replaced by a memristor. We looked in detail at the fabrication method and inverter design of the memristor-transistor combination. The required switching characteristics of the memristor are investigated by modelling a current- and voltage-controlled ‘reset’ as well as a voltage-swept ‘set’. The results show it is critical that the memristor can be set by sweeping the input voltage across a small range in the reverse direction. To achieve this, precise control and excellent repeatability of the memristor set (and reset) voltage are required.





Flewitt, Andrew J


TFT, CMOS, metal oxide, flexible electronics, transistor, inverter, SnO, ISO, IGZO, thin film transistor


Doctor of Philosophy (PhD)

Awarding Institution

University of Cambridge
EPSRC (1771835)
Tis work was supported by the UKRI Engineering and Physical Sciences Research Council through the Centre of Doctoral Training in Integrated Photonic and Electronics Systems (EP/L015455/1) and grant EP/P027032/1.