Kiwi Scientific Acceleration at Large: Incremental Compilation and Multi FPGA HLS Demo
FPL 2017 - The International Conference on Field-Programmable Logic and Applications
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Greaves, D. (2017). Kiwi Scientific Acceleration at Large: Incremental Compilation and Multi FPGA HLS Demo. FPL 2017 - The International Conference on Field-Programmable Logic and Applications. https://doi.org/10.17863/CAM.13297
The Kiwi project revolves around a compiler that converts C# .NET bytecode into Verilog RTL and/or SystemC. An alpha version of the Kiwi toolchain is now open source and a user community is growing. We will demonstrate an incremental approach to large system assembly of HLS and blackbox components, based on an extended IP-XACT intermediate representation. We show how to address multi- FPGA designs with object passing between components, automatic configuration of shared memory maps and automatic assembly of debugging infrastructure. We will also demonstrate the use of the unsafe subset of the C# language for type casting between byte arrays and structures which is a common coding style for network protocol implementations. Unsafe programming is also needed for user- coded memory managers that need to essentially perform address arithmetic, but such procedures can commonly defeat the memory pool disambiguation algorithms in static analysis.
This record's DOI: https://doi.org/10.17863/CAM.13297
This record's URL: https://www.repository.cam.ac.uk/handle/1810/267294