On-chip hybrid Superconducting-Semiconducting Circuit
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Authors
Puddy, R
Ma, P
Yi, Teng
Cao, M
Richardson, CL
Farrer, I
Kelly, M
Publication Date
2018-03-06Journal Title
IEEE Transactions on Applied Superconductivity
ISSN
1051-8223
Publisher
IEEE
Volume
28
Issue
4
Language
eng
Type
Article
This Version
AM
Metadata
Show full item recordCitation
Delfanazari, K., Puddy, R., Ma, P., Yi, T., Cao, M., Richardson, C., Farrer, I., et al. (2018). On-chip hybrid Superconducting-Semiconducting Circuit. IEEE Transactions on Applied Superconductivity, 28 (4)https://doi.org/10.1109/TASC.2018.2812817
Abstract
In this paper, we experimentally demonstrate a hybrid superconducting-semiconducting (S-Sm) circuit consisting of eight planar and ballistic Nb-In0.75Ga0.25As-Nb Josephson junctions. E-beam lithography was used to fabricate the Josephson junctions on an InGaAs chip. In contrast to our previous studies on long junctions that were fabricated by photolithography, in this study, we observe the induced superconductivity in an In0.75Ga0.25As quantum well at higher temperatures, between T= 0.3 and 1.4 K (3He cryostat temperature range). The induced superconducting gap of & #x0394;ind= 0.65 meV was measured at lowest base temperature T= 300 mK. The effect of temperature and magnetic fields B on the induced superconductivity are presented. Our results suggest that our In0.75Ga0.25As heterojunctions is a promising scalable material system for quantum processing and computing applications.
Keywords
Josephson junctions, quantum computing, hybrid superconductor-semiconductor junction, on-chip quantum circuits
Relationships
Is supplemented by: https://doi.org/10.17863/CAM.20606
Sponsorship
EPSRC (EP/M009505/1)
UNIVERSITY COLLEGE LONDON (FB EPSRC) (EP/K004077/1)
UNIVERSITY COLLEGE LONDON (FB EPSRC) (EP/J017671/1)
EPSRC (EP/M009505/1)
Identifiers
External DOI: https://doi.org/10.1109/TASC.2018.2812817
This record's URL: https://www.repository.cam.ac.uk/handle/1810/278541
Rights
Licence:
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