Modelling and Design Optimisations of CMOS MEMS Single Membrane Thermopile Detector Arrays

Abstract

Thermal imaging devices based on Complementary Metal-Oxide-Semiconductor (CMOS) and Micro-Electro-Mechanical System (MEMS) technology are widely used across consumer and industrial applications. The combination of CMOS and MEMS technologies allows for the production of devices with high performance, good reliability and consistent reproducibility. Additionally, these technologies allow devices to be manufactured at low cost and a high volume.

There are several types of thermal sensing technologies, however, this thesis mainly focuses on 8×8 thermopile based Focal Plane Arrays (FPAs). The core principles governing the function of thermopiles are based on the Seebeck effect. In this thesis, the structure and fabrication process of thermopile FPAs are described and discussed. The thesis describes the functionality of the array chip and introduces a new experimental technique, called the bi-directional electrical biasing method, which was applied to obtain the device’s responsivity and crosstalk measurements. Compared to traditional measurement approaches using laser sources, this novel method significantly reduces the complexity of the experimental setup, as no external laser source is required. The crosstalk of the 8×8 array is ~2.69% and the responsivity is ~73.1 V/W. A detecting system using a larger array chip was designed, created and successfully applied in a series of experiments that involved gesture recognition and people counting.

In order to enhance the performance of the current array device, a 3D simulation model based on the Finite Element Method (FEM) was built using the COMSOL Multiphysics simulation tool. The numerical model was validated by comparing the model’s simulated values for responsivity, crosstalk and temperature distribution with experimental results. The difference between the simulations and experimental results was <5%. With the aim of optimising various trade-offs, modifications in heatsinking track widths/materials, additional air gaps between pixels, different packaging and different pixel sizes were assessed using numerical models. A design with copper heatsinking tracks and air gaps showed the best results, achieving an increase in responsivity by 6.4% while simultaneously reducing crosstalk by 65%. In addition, the vacuum packaging can reduce the crosstalk to less than 0.7% (only 0.2% in the model with copper tracks) and increase the responsivity to > 90 V/W in the model with tungsten tracks. A 32×32 array design demonstrates the smallest pixel size that can be achieved based on this thermopile array design. The 32×32 array design increased responsivity to ~77.18 V/W and crosstalk remained <4%. Crosstalk rose sharply to >6% when the pixel size was reduced further in a 64×64 array design, at this level of crosstalk, image quality is likely to be significantly affected.

Future work may focus on the implementation of carbon nanotubes or novel 3D thermopile designs. Carbon nanotubes, when deposited over the array chip, could enhance the absorption of IR radiation. While new thermopiles employing a 3D design could dramatically reduce array size and potentially achieve a fill factor of 100%.