The Internet of Things (IoT) is a system in which common objects in our lives are able to broadcast and communicate information as nodes in a large network of information. This diverse application system is a growing interest for many industries. Large Area Electronics (LAE) is required to effectively produce the mass quantity of small, low-profile devices that will be embedded in these objects. Due to the scale and irregularity of the form factor, the need for flexible thin-film electronics arises. Metal-oxide materials are a prime candidate. They can be fabricated cheaply, in large areas, using the current electronics infrastructure. Some devices are already being produced in industry; however, they typically rely on an NMOS device architecture, which is inferior to CMOS. While NMOS is a type of digital circuit design which utilises only n-type semiconductors, CMOS utilises complementary n-type and p-type transistors to enable low-power and stability. P-type metal-oxide semiconductors have performed poorly in transistor devices and have prevented metal-oxide electronics from using CMOS. A suitable p-type transistor, to complement current n-type technology, is needed in order to implement CMOS and improve flexible metal-oxide electronics enough to be viable for the IoT or other flexible electronics applications.

In this work, metal oxide Cu₂O Thin Film Transistors (TFTs) are fabricated using High Target Utilisation Sputtering (HiTUS). In previous work, it was shown that the high off-current associated with Cu₂O TFTs may be attributed to an atypical minority-carrier electron current leakage in the off-state. This gives a focus for device improvement. Most research in this area has focused on material improvements and inventions to attempt to create high performance devices. After all, this was the method through which n-type metal oxides first thrived, with IGZO being the prime example. However, this work aims to instead alter the device design to work with the present material limitations. An Electron Blocking Layer (EBL) is proposed and implemented for the first time on metal oxide TFTs. Further, good-quality c-Si/Cu₂O PN junctions are also fabricated and used to efficiently trial EBL materials.

NiO and MoO₃ EBL materials are shown to moderately improve the on-off ratio by 141 % from 5.1 to 12.3, while CuI and WO₃ show no improvement. It was concluded that the minority carrier accumulation was not the dominant source of off-current leakage for devices in this work. In a further effort to identify the more dominant source of the off-current, defect passivation was investigated. A minimum of 5 nm of Al₂O₃, when applied as a passivation layer to the back channel of annealed Cu₂O TFTs, was shown to greatly improve the on/off ratio by 150000 %, three orders of magnitude, from 11 to 1.7×10⁴. Finally, a new TFT design is proposed, in light of the results from this work, that incorporates SnO and a graded Tantalum EBL.