Abstracting the Classic Five-Stage Pipeline

Abstract

The classic five-stage processor pipeline has been the mainstay of introductory computer architecture courses for decades, and still forms the basis of low-to-medium performance cores produced today. While the key concepts of the pipeline can be understood independently of any specific instruction set, processor implementations rarely consider it as an abstract component in its own right. In this tutorial, we implement the pipeline as a small, standalone component that can be understood and formally verified in isolation, and that can be connected up to a separately defined instruction-set implementation to form a full processor core. To achieve this separation, we use functional programming to capture interfaces that would be awkward to express using traditional hardware description languages. These interfaces support finer-grained processor verification, and open up new opportunities for component reuse, such as the ability to connect the same instruction-set implementation and verification framework to different pipeline implementations.