Stability under Gate Bias Stressing of Amorphous Oxide Thin Film Transistors
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Abstract
Stability of amorphous zinc tin oxide thin film transistors (TFTs) is investigated under positive bias stressing (PBS) at temperatures between 65 and 105 °C. The time and temperature dependence of the threshold voltage shift is analyzed using a thermalization energy concept. A maximum energy barrier to defect migration of 0.76 eV and the attempt-to-escape frequency of 10$^7$ s$^{-1}$ are extracted. These values are compared with those under PBS of amorphous indium gallium zinc oxide and hydrogenated amorphous silicon TFTs. The oxygen vacancy migration model that was proposed for amorphous oxide semiconductors is contrasted with the defect creation model that was proposed for amorphous silicon.
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ECS Transactions
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Journal ISSN
1938-5862
1938-6737
1938-6737
Volume Title
75
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The Electrochemical Society
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Engineering and Physical Sciences Research Council (EP/M013650/1)
