CHERI JNI: Sinking the Java security model into the C
Chisnall, David Thomas
Woodruff, Jonathan David
Markettos, Athanasios Theodore
Watson, Robert Nicholas
Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems
ASPLOS 2017: 22nd ACM International Conference on Architectural Support for Programming Languages and Operating Systems
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Chisnall, D. T., Davis, B., Gudka, K., Brazdil, D., Joannou, A., Woodruff, J. D., Markettos, A. T., et al. CHERI JNI: Sinking the Java security model into the C. Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 569-583. https://doi.org/10.17863/CAM.9783
Java provides security and robustness by building a high-level security model atop the foundation of memory protection. Unfortunately, any native code linked into a Java program – including the million lines used to implement the standard library – is able to bypass both the memory protection and the higher-level policies. We present a hardware-assisted implementation of the Java native code interface, which extends the guarantees required for Java’s security model to native code. Our design supports safe direct access to buffers owned by the JVM, including hardware-enforced read-only access where appropriate. We also present Java language syntax to declaratively describe isolated compartments for native code. We show that it is possible to preserve the memory safety and isolation requirements of the Java security model in C code, allowing native code to run in the same process as Java code with the same impact on security as running equivalent Java code. Our approach has a negligible impact on performance, compared with the existing unsafe native code interface. We demonstrate a prototype implementation running on the CHERI microprocessor synthesized in FPGA.
This work is part of the CTSRD and MRC2 projects sponsored by the Defense Advanced Research Projects Agency (DARPA) and the Air Force Research Laboratory (AFRL), under contracts FA8750-10-C- 0237 and FA8750-11-C-0249. The views, opinions, and/or findings contained in this paper are those of the authors and should not be interpreted as representing the official views or policies, either expressed or implied, of the Department of Defense or the U.S. Government. We also acknowledge the EPSRC REMS Programme Grant [EP/K008528/1], the EPSRC Impact Acceleration Account [EP/K503757/1], Isaac Newton Trust, UK Higher Education Innovation Fund (HEIF), Thales E-Security, and Google, Inc.
This record's DOI: https://doi.org/10.17863/CAM.9783
This record's URL: https://www.repository.cam.ac.uk/handle/1810/264315