Automatically accelerating non-numerical programs by architecture-compiler co-design
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Peer-reviewed
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Abstract
jats:pBecause of the high cost of communication between processors, compilers that parallelize loops automatically have been forced to skip a large class of loops that are both critical to performance and rich in latent parallelism. HELIX-RC is a compiler/microprocessor co-design that opens those loops to parallelization by decoupling communication from thread execution in conventional multicore architecures. Simulations of HELIX-RC, applied to a processor with 16 Intel Atom-like cores, show an average of 6.85× performance speedup for six SPEC CINT2000 benchmarks.</jats:p>
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Keywords
46 Information and Computing Sciences
Journal Title
Communications of the ACM
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Journal ISSN
0001-0782
1557-7317
1557-7317
Volume Title
60
Publisher
Association for Computing Machinery (ACM)
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Sponsorship
Engineering and Physical Sciences Research Council (EP/K026399/1)