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Deep p-Ring Trench Termination: An Innovative and Cost-Effective Way to Reduce Silicon Area

Accepted version
Peer-reviewed

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Abstract

A new type of high-voltage termination, namely the “deep p-ring trench” termination design for high-voltage, high-power devices, is presented and extensively simulated. Termination of such devices consumes a large proportion of the chip size; the proposed design concept not only reduces the termination silicon area required but also removes the need for an additional mask as is the case of the traditional p+ ring-type termination. Furthermore, the presence of the p-ring under and around the bottom of the trench structure reduces the electric field peaks at the corners of the oxide, which results in reduced hot carrier injection and improved device reliability.

Description

Journal Title

IEEE Electron Device Letters

Conference Name

Journal ISSN

0741-3106
1558-0563

Volume Title

40

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

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Sponsorship
Royal Society (DH160139)